This study provides a smart solution to determine the optimal preset temperatures of the reflow oven, which is usually relied on experience. The study of reflowing a new PCB assembly can be started at the early stage of board design with no need for a physical profiling board prototype. The prediction of the reflow profile subjected to varied temperature settings of the reflow oven is beneficial to process engineers when reflowing bulky components. Using this system, the reflow oven temperature settings to achieve the desired reflow profile can be obtained at substantially reduced computation cost. Integrated physical and ML models synergistically can accurately predict reflow profiles of solder joints and alleviate the expense of repeated trials. Support vector regression and an artificial neural network are used to validate the accuracy of ML models. The training data provided to the machine learning (ML) model is generated from a programmed system based on the physics model. In this study, computational fluid dynamics modeling is used to simulate the reflow soldering process. This paper aims to provide the proper preset temperatures of the convection reflow oven when reflowing a printed circuit board (PCB) assembly with varied sizes of components simultaneously. This review paper is expected to provide necessary information and direction to future researchers and industrial engineers when designing a brand-new surface-mounted component. Moreover, the Cu pillar technology challenges are also highlighted in this review. The considerations of air flow and thermal effects enhanced the study of fluid flow on the PCB assembly. The temperature distribution and the thermal stress condition of the PCB assembly within the reflow oven are predicted to understand better the fluid–structure interaction in the reflow oven. The thermal and air flow aspects of the reflow process are reviewed.
Thus, this review focuses on the simulation modeling of the PCB assembly within a reflow oven using different numerical approaches. The simulation tools have recently facilitated the Cu pillar bump research during the PCB assembly process. The conversion of the flip-chip interconnection bump from the solder ball to the Cu pillar bump with the solder cap and the joint performance within the reflow oven are presented in this review. This technology with area array feature is a surface mount technology process used to form interconnection bonding between ball grid array chip and printed circuit board (PCB) by the reflow soldering process. This paper reviewed the state-of-art copper pillar technology in flip-chip packaging, driven by the semiconductor industry’s demands for thinner and faster data transmission.
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